Single transistor memory cell and device and fabricating methods

摘要

A single transistor floating-body dynamic random access memory (DRAM) device structure includes a floating body (55) located on a semiconductor substrate (51) and a gate electrode (63) located on the floating body, the floating body including an excess carrier storage region (55S). The DRAM device further includes source and drain regions (73) respectively located at both sides of the gate electrode, and leakage shielding patterns (71') located between the floating body and the source and drain regions. Each of the source and drain regions contact the floating body.