| 摘要 |
Circuit arrangement for driving a high side semiconductor switch (T1) with a first load terminal receiving a first supply potential (Vin), second load terminal providing a phase-feedback signal (S121), and a control terminal; said circuit arrangement comprising a signal conditioning circuit (12), receiving, an input signal (S121), a phase-feedback signal (S122) and providing a set signal (S131), which is set to a first logic level at a first edge of said input signal (S121) and to a second logic level at a corresponding edge of said phase-feedback signal (S122) but not before a certain delay-time (Td) has elapsed, a reset signal (S132), which is set to said first logic level at a second edge of said input signal (S121) and to said second logic level at a corresponding edge of said phase-feedback signal (S122) but not before said certain delay-time (Td) has elapsed, wherein all signals in said signal conditioning circuit (12) refer to a ground potential (GND), a floating logic circuit (13), receiving said set signal (S131) and said reset signal (S132) and providing an output signal (S141) with respect to the potential of said phase-feedback signal (S122), wherein said output signal (S141) is set to said first logic level at a first edge of said set signal (S131) and said output signal (S141) is set to said second logic level at a first edge of said reset signal (S132) and a floating driver circuit (14) connected to said control terminal of said high side switch (T1) and receiving said output signal (S141).
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