| 摘要 |
<p>A method for manufacturing a flash memory device is provided to decrease the height of an oxide layer spacer to prevent the generation of impurity by simultaneously etching the oxide layer spacer which is formed at a side wall when removing a metal layer and a dielectric layer. A gate oxide layer pattern(102) and a first conductive pattern(104) are formed in a peripheral region of a semiconductor substrate(100), and an device isolation layer(106) is formed on the semiconductor substrate. A dielectric layer(108), a second conductive layer(110), a metal layer(112) and a hard mask layer pattern(114) are formed on the entire structure comprising the device isolation layer. A gate is patterned by performing a first etching process along the hard mask layer pattern. An oxide layer for spacer is formed above the gate. A second etching process is performed to remove the oxide layer for spacer and the hard mask layer pattern. A third etching process is performed to remove the metal layer. A fourth etching process is performed to remove the second conductive layer.</p> |
