发明名称 SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD THEREOF
摘要 A semiconductor memory device and an operation method thereof are provided to generate an output enable signal at the determined time of a DLL(Delay Locked Loop) clock without a delay element and an option circuit required in crossing a domain. A delay locked loop(200) generates a DLL(Delay Locked Loop) clock by delaying an external clock. An internal command signal generation unit(100) generates an internal read command signal in response to a read command. A delay unit(300) delays the internal read command signal as much as time corresponding to delay time of the delay locked loop. An output enable signal generation unit(400) generates an output enable signal in response to an output signal of the delay unit and the DLL clock.
申请公布号 KR20080039076(A) 申请公布日期 2008.05.07
申请号 KR20060106780 申请日期 2006.10.31
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, JEE YUL;SHIN, BEOM JU
分类号 G11C8/00 主分类号 G11C8/00
代理机构 代理人
主权项
地址