发明名称 METHOD AND APPARATUS FOR GENERATION A MODELLING DATA FOR ARRANGING A MASK PATTERN IN A SEMICONDUCTOR
摘要 <p>A method and an apparatus for generating modeling data for arranging a mask pattern on a semiconductor are provided to improve the accuracy of OPC(Optical Proximity Correction) by inserting a dummy pattern in a dummy region of each simulation area. Chip design layout region data is extracted from a full chip database(102). The chip design layout region is divided into plural simulation regions(104). Layouts of the respective simulation regions are compared with each other to set up a reference region and a dummy region(106). Degrees of pattern congestion with respect to the respective dummy regions are compared with each other and dummy patterns are inserted into the respective dummy regions to control the degrees of pattern congestion of the dummy patterns(108,110). Simulation is performed on each simulation region whose the degree of pattern congestion is controlled to calculate modeling data(112). When the degrees of pattern congestion are controlled, pattern densities of the respective dummy regions are inspected to set up a reference dummy region with a certain one of them. The number of the dummy patterns inserted into the respective dummy regions is determined based on the reference dummy region. The dummy patterns are inserted into the respective dummy regions according to the determined number of the dummy patterns to control the degrees of pattern congestion.</p>
申请公布号 KR100827474(B1) 申请公布日期 2008.05.06
申请号 KR20060105589 申请日期 2006.10.30
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 LEE, JUN SEOK
分类号 H01L21/027 主分类号 H01L21/027
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