| 摘要 |
A circuit generally including a first module, a second module and a third module is disclosed. The first module may be configured to (i) generate a plurality of parsed residual blocks by parsing a plurality of 4x4 CAVLC (context-based adaptive variable length coding) residual blocks received in an input signal and (ii) generate a plurality of metric signals resulting from the parsing of the 4x4 CAVLC residual blocks. The second module configured to generate a plurality of scanning position signals based on the metric signals. The third module configured to generating an 8x8 CABAC (context-based adaptive binary arithmetic coding) residual block in an output signal by up-sampling the parsed residual blocks based on the scanning position signals.
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