发明名称 Method and apparatus of stress relief in semiconductor structures
摘要 A method, apparatus and system are provided for relieving stress in the via structures of semiconductor structures whenever a linewidth below a via is larger than a ground-rule, including providing a via at least as large as the groundrule, providing a landing pad above the via, providing a via bar in place of a via, slotting the metal linewidth below the via, or providing an oversize via with a sidewall spacer.
申请公布号 US7368804(B2) 申请公布日期 2008.05.06
申请号 US20030439874 申请日期 2003.05.16
申请人 INFINEON TECHNOLOGIES AG 发明人 HOINKIS MARK;HIERLEMANN MATTHIAS;FRIESE GERALD;COWLEY ANDY;WARNER DENNIS J.;KALTALIOGLU ERDEM
分类号 H01L23/58;H01L23/48;H01L23/522 主分类号 H01L23/58
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