发明名称 |
Method for fabricating a transformer integrated with a semiconductor structure |
摘要 |
A substrate is provided and a top interconnection metal layer and a primary winding layer are formed thereon. Then a passivation layer having a plurality of via exposed parts of the top interconnection metal layer is formed on the substrate. A secondary winding layer and at least a bonding pad are formed on the passivation layer. The bonding pad electrically connects to the top interconnection metal layer through the via.
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申请公布号 |
US7367113(B2) |
申请公布日期 |
2008.05.06 |
申请号 |
US20060278952 |
申请日期 |
2006.04.06 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
HUNG CHENG-CHOU;TSENG HUA-CHOU;LIANG VICTOR-CHIANG;CHEN YU-CHIA;HSU TSUN-LAI |
分类号 |
H01F41/02 |
主分类号 |
H01F41/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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