发明名称 ANALYSIS AND OPTIMIZATION OF MANUFACTURING YIELD IMPROVEMENTS
摘要 Techniques for improving the design of circuits, such as integrated microcircuits. A proposed circuit design is analyzed to identify design features associated with yield loss in manufactured circuits. Corrective design changes that will reduce the yield losses associated with the yield loss features then are designated. Once the corrective design changes have been determined, the corrective design changes that will optimize the manufacturing yield of the circuit are selected and incorporated into the circuit design. This analysis and revision process may then be repeated for each revised circuit design, until no further reduction in the manufacturing can be obtained.
申请公布号 WO2007133423(A3) 申请公布日期 2008.05.02
申请号 WO2007US10214 申请日期 2007.04.27
申请人 MENTOR GRAPHICS CORP.;PIKUS, FEDOR, G.;LOBASSO, STEVEN, WILLIAM;ALBRECHT, ROBIN, KIRK;SRINIVASAN, SRIDHAR 发明人 PIKUS, FEDOR, G.;LOBASSO, STEVEN, WILLIAM;ALBRECHT, ROBIN, KIRK;SRINIVASAN, SRIDHAR
分类号 G06F17/50 主分类号 G06F17/50
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