| 摘要 |
A planar stack package is provided to prevent deflection of a wire bonding by connecting a metal wire for electrically connecting a semiconductor chip and a lead. A lead frame(9) having a lead(6) is mounted on both sides of a chip mounting plate(3). A pair of semiconductor chips(1a,1b,1c,1d) are attached to upper and lower surfaces of the chip mounting plate, and are spaced apart from each other. Each semiconductor chip is electrically connected to the lead of the lead frame via metal wires(2a,2b,2c,2d). An encapsulant(7) seals a spatial region comprising a portion of the lead, as well as the semiconductor chips and the metal wires. A spacer tape(5) is attached to each semiconductor chip. |
