METHOD AND APPARATUS FOR MEMORY ARRAY INCORPORATING TWO DATA BUSSES FOR MEMORY ARRAY BLOCK SELECTION

摘要

Circuits and methods (370) are described for decoding exemplary memory arrays (374, 375) of programmable, re-writable passive element memory cells, which are particularly useful for extremely dense three-dimensional memory arrays having more than one memory plane. In addition, circuits and methods (370) are described for selecting one or more array blocks (374, 375) of such a memory array, for selecting one or more word lines (377) and bit lines within selected array blocks (374, 375), for conveying data information to and from selected memory cells within selected array blocks, and for conveying unselected bias conditions to unselecte array blocks.