发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT AND MANUFACTURING PROGRAM THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor integrated circuit which can easily and efficiently reduce a defective pattern caused by microfabrication with the comparatively small number of processes. SOLUTION: This manufacturing method is provided with a revisable condition setting step of setting resivable conditions including restrictions on the revised chip size of a temporary layout pattern on the basis of a chip size obtained based on the temporary layout pattern; a revision information acquiring step (S#103) of acquiring a plurality of items of revision information including a release dimension restriction having a gradually released restriction on dimensions for each kind of dimension restriction; a priority setting step (S#104) of setting priority on each item of the revision information; and a revision processing step of selecting revision information on the basis of the priority, extracting a pattern revised from the temporary layout pattern on the basis of the kind of the dimension restriction of the selected revision information (S#107), and reflecting a revision processing result satisfying the release dimension restriction of the revision information having higher priority and the revisable conditions of revision processing results for the extracted pattern to be revised on the temporary layout pattern. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008103377(A) 申请公布日期 2008.05.01
申请号 JP20060282193 申请日期 2006.10.17
申请人 SHARP CORP 发明人 SAKAMOTO MASAHISA
分类号 H01L21/82;G06F17/50 主分类号 H01L21/82
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