发明名称 |
METHOD OF GENERATING TEST CLOCK SIGNAL AND TEST CLOCK SIGNAL GENERATOR FOR TESTING SEMICONDUCTOR DEVICES |
摘要 |
A system and method of generating a test clock signal for scan testing of a main circuit in a semiconductor device includes receiving an external clock signal and a control signal and generating a gated clock signal by gating an internal clock signal based on the control signal. The internal clock signal has a frequency higher than a frequency of the external clock signal. One of the external clock signal and the gated clock signal is selectively output based on the control signal.
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申请公布号 |
US2008103719(A1) |
申请公布日期 |
2008.05.01 |
申请号 |
US20070862305 |
申请日期 |
2007.09.27 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD |
发明人 |
SEONG HAN-SOO |
分类号 |
G01M99/00 |
主分类号 |
G01M99/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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