| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To prevent erroneous writing into a non-selection memory cell and to provide a semiconductor memory device having the improved integration degree. <P>SOLUTION: The semiconductor memory device 100 includes: a plurality of bit lines; a plurality of word lines intersecting with the plurality of bit lines; a source line arranged between the predetermined number of word lines; first selection transistors connected to the bit lines; and second selection transistors connected to the source line. The device is also equipped with: memory cell units having memory cell columns connecting a plurality of electrical erasure type nonvolatile memory cells in series while one end is connected to the first selection transistor and a first control electrode is connected to the word line; and a transistor electrically connected in series between the memory cell at another end of the memory cell column and the second selection transistor, and on which an intermediate potential between a potential applied on the first control electrode of the memory cell at another end and a potential applied on a second control electrode of the second selection transistor is applied on a third control electrode, in the non-selected state of data writing operation of the memory cell at another end. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
