发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce a chip occupied area by employing a fixed data shift redundancy method and enabling to share a data buffer among defective address latch circuits in a plurality of relief areas. SOLUTION: In a fixed shift redundancy circuit of a semiconductor memory, the address latch circuits CFDLTC<0>-<3> provided corresponding to each of the relief areas <0>-<3> to store the defective column address share a read side switch and a write side switch. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008102987(A) 申请公布日期 2008.05.01
申请号 JP20060282804 申请日期 2006.10.17
申请人 TOSHIBA CORP 发明人 IIZUKA MARIKO
分类号 G11C29/04;G11C11/401 主分类号 G11C29/04
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