发明名称 BUFFER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a buffer circuit which satisfies both low power consumption and slew rate characteristics that are in a trade-off relation with each other. SOLUTION: The buffer circuit is provided with a differential-voltage detection circuit 10, composed of differential amplifier circuits 11, 12, for detecting a differential voltage between an input signal and an output signal during rising of the input signal and a differential voltage between the input signal and the output signal during falling of the input signal. Voltage-current conversion circuits 21, 22 increase a bias current supplied to an output NMOSm1 and an output PMOSm2 constituting an output circuit on the basis of each differential voltage so as to supply the bias current. The differential-voltage detection circuit 10, composed of the differential amplifier circuits 11, 12, has a prescribed offset voltage and increases a bias current only when each differential voltage exceeds an offset voltage, namely, only when the input signal is steeply changed (risen or fallen). COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008104063(A) 申请公布日期 2008.05.01
申请号 JP20060286263 申请日期 2006.10.20
申请人 CANON INC 发明人 YAMAZAKI ZENICHI
分类号 H03K19/0175;H03K17/687 主分类号 H03K19/0175
代理机构 代理人
主权项
地址