| 摘要 |
PROBLEM TO BE SOLVED: To provide a ferroelectric memory that has a function to supply an optimal word line voltage even if cell transistor resistances are not equal by adjusting the word line potentials depending on characteristics of cell transistors to make their resistances equal. SOLUTION: A row decoder control circuit 5 is mainly composed of a cell transistor evaluation section 51 to evaluate the cell transistors Tr built in a memory cell MC, a voltage regulator 52 to adjust the voltage to the power supply 51 supplying voltage to the cell transistor based on cell transistor evaluation, and a voltage supply 53 to supply a voltage to the row decoder circuit 4 based on the voltage regulator 52. The cell transistor evaluation section 51 has a cell transistor resistance determination circuit 51A to measure the resistances of the cell transistors Tr constituting the memory cells MC, and a cell transistor resistance determination control circuit 51B to control the cell transistor resistance determination circuit 51A. COPYRIGHT: (C)2008,JPO&INPIT |
