| 摘要 |
PROBLEM TO BE SOLVED: To provide an integrated circuit capable of surely holding data in a standby mode with reduced leakage current. SOLUTION: Higher electric potential than a power supply line VDD is supplied to a power supply line VDDIO, and lower electric potential than a ground line GND is supplied to a ground line GNDIO. A virtual power supply line VDDV and a virtual ground line GNDV are connected with the power supply line VDD and ground line GND in operation mode while being floated in standby mode, by switches 130, 140. Substrates of MOS transistors 121, 122 are connected with the power supply line VDD and the ground line GND in operation mode while being connected with the power supply line VDDIO and the ground line GNDIO in standby mode, by switches 150, 160. A gate circuit 170 sends an output signal of a data non-holding circuit 110 to a data holding circuit 120 in operation mode while fixing an input signal to the data holding circuit 120 in standby mode. COPYRIGHT: (C)2008,JPO&INPIT
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