发明名称 Method and system for tuning a circuit
摘要 The present invention relates to a method and system for tuning a circuit. In one embodiment, the method includes receiving a description of the circuit, and selecting a design point of the circuit for evaluation using a sizing tool, where the design point comprises a design of the circuit that meets a set of predefined design specifications, and the circuit comprises a group of circuit devices. The method further includes receiving a set of tuning information for the group of circuit devices tuning the group of circuit devices using the set of tuning information to create a group of tuned circuit devices, creating an updated layout of the group of tuned circuit devices using a layout tool, creating estimated parasitic information of the group of tuned circuit devices using the updated layout, and verifying the design point meets design goals of the circuit using the estimated parasitic information of the updated layout.
申请公布号 US2008104548(A1) 申请公布日期 2008.05.01
申请号 US20060580735 申请日期 2006.10.12
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 YAN RONGCHANG;GOPALAKRISHNAN PRAKASH
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址