发明名称 BIST SYSTEM AND SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a BIST system and a semiconductor memory device in which a sense amplifier for automatic operation only, an automatic operation control circuit, a sense amplifier, and a sense amplifier control circuit are operated in the same selection test, a time for selection test is shortened, and a selection test cost can be reduced. SOLUTION: The BIST system and the semiconductor memory device 1 are provided with a sense amplifier for automatic operation only 37, an automatic operation control system 30, a BIST control circuit 35, and a BIST result storing circuit 36. Further, the device is provided with a first selector 41 supplying either of the first address or the second address, and a second selector 42 switching the first output data output from a sense amplifier 13 and the second output data output from the sense amplifier for automatic operation only 37. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008102977(A) 申请公布日期 2008.05.01
申请号 JP20060282225 申请日期 2006.10.17
申请人 TOSHIBA CORP;TOSHIBA INFORMATION SYSTEMS (JAPAN) CORP;TOPPAN PRINTING CO LTD 发明人 KOMINE YUJI;KASAI TAKAMICHI;MATSUDA HIROYUKI
分类号 G11C29/12;G01R31/28 主分类号 G11C29/12
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