发明名称 A/D CONVERTER
摘要 PROBLEM TO BE SOLVED: To obtain an A/D converter whose A/D conversion precision can be improved by taking conversion error trends of an analog input voltage value into consideration. SOLUTION: An offset information storage register 5 stores an offset adjustment value in a format corresponding to bits b0 and b1. An offset value generator 4 is connected to a successive approximation register 2 so that values of the bits b0 and b1 can be read out, and storage contents of the offset information storage register 5 can be referred to. The offset value generator 4 outputs an offset adjustment signal S4 indicating an offset adjustment value OF obtained by reference to an offset information storage register 5 based upon a combination of the bits b0 and b1 after the bits b0 and b1 are determined. A reference voltage generator 3b generates a reference voltage VREF using a ladder resistance unit 3a based upon the offset adjustment signal S4 and bits b0 to bi (i=0 to 9). COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008103813(A) 申请公布日期 2008.05.01
申请号 JP20060282485 申请日期 2006.10.17
申请人 RENESAS TECHNOLOGY CORP 发明人 MAEDA SHOHEI
分类号 H03M1/10;H03M1/38 主分类号 H03M1/10
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