发明名称 |
PROCESSOR FOR EXECUTING HIGHLY EFFICIENT VLIW |
摘要 |
A 32-BIT INSTRUCTION (50) IS COMPOSED OF A 4-BIT FORMAT FIELD (51), A 4-BIT OPERATION FIELD (52), AND TWO 12- BIT OPERATION FIELDS (59 AND 60).THE 4-BIT OPERATION FIELD (52) CAN ONLY INCLUDE (1) AN OPERATION CODE "CC" THAT INDICATES A BRANCH OPERATION WHICH USES A STORED VALUE OF THE IMPLICITLY INDICATED CONSTANT REGISTER (36) AS THE BRANCH ADDRESS, OR (2) A CONSTANT "CONST".THE CONTENT OF THE 4-BIT OPERATION FIELD (52) IS SPECIFIED BY A FORMAT CODE PROVIDED IN THE FORMAT FIELD (51).(FIG 4)
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申请公布号 |
MY135426(A) |
申请公布日期 |
2008.04.30 |
申请号 |
MYPI0302352 |
申请日期 |
1998.06.16 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
SHUICHI TAKAYAMA;NOBUO HIGAKI |
分类号 |
G06F9/30;G06F9/318;G06F9/38 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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