发明名称
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a low-temperature-baked multilayer ceramic wiring board, capable of increasing the degrees of freedom of a design of the wiring circuit board and a layer structure of an insulating layer with hardly constraints about the layer structure of the several insulating layers, having a different pattern shape of the wiring circuit layer arranged on the layer body and contraction behaviour. SOLUTION: Warpage in the wiring board occurring with a mixture of several type of insulating layers 45, having different arrangement rate or contraction behaviour of the wiring circuit layers 35 of the low-temperature-baked multilayer ceramic wiring board comprising a plurality of insulating layers 31, can be suppressed by controlling the amount of glass contained in a holding sheet 51 laminated on the surface and the rear surface of the low-temperature-baked ceramic laminate. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP4084696(B2) 申请公布日期 2008.04.30
申请号 JP20030120763 申请日期 2003.04.24
申请人 发明人
分类号 H05K3/46 主分类号 H05K3/46
代理机构 代理人
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