发明名称
摘要 <p>PROBLEM TO BE SOLVED: To provide a semiconductor device wherein characteristics is evaluated in wafer. SOLUTION: An IC pattern provided on a surface 50a of a substrate 1, recess 3 provided on a side surface while extending in the thickness direction of the substrate 1, signal input/output pad 2 connected to the IC pattern provided around the recess 3 on the surface, metal layer 4 formed at the recess 3 and conductive to the signal input/output pad 2, and ground conductor 7 formed on a backside 50b, are provided to a semiconductor device 50, wherein a signal is inputted/outputted to the IC pattern trough the metal layer 4 and signal input/output pad 2. Here, the metal layer 4 is so formed not to reach the backside 50b at the recess 3.</p>
申请公布号 JP4082820(B2) 申请公布日期 2008.04.30
申请号 JP19990073997 申请日期 1999.03.18
申请人 发明人
分类号 H01L21/66;H01L23/52;H01L21/3205 主分类号 H01L21/66
代理机构 代理人
主权项
地址