发明名称
摘要 <p>A status register within a non-volatile semiconductor memory device chip is provided with a bit indicating whether an access is possible from the external side of the chip or not and a controller for instructing the write process to the non-volatile semiconductor device issues again a write process instruction to the same area depending on the condition of the bit of the status register. Thereby, reduction of effective memory area due to an accidental write error generated can be prevented in the system utilizing an electrically erasable and programmable non-volatile semiconductor memory device such as a flash memory.</p>
申请公布号 JP4082482(B2) 申请公布日期 2008.04.30
申请号 JP20000376170 申请日期 2000.12.11
申请人 发明人
分类号 G06F12/14;G06F12/16;G06F13/00;G06F21/02;G11C11/56;G11C16/02;G11C16/22 主分类号 G06F12/14
代理机构 代理人
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