| 摘要 |
A delay locked loop of a semiconductor memory device is provided to minimize power consumption by reducing current consumption of the delay locked loop of the semiconductor memory device. A DLL(Delay Locked Loop) driver(203) generates a DLL clock in response to an output of a delay line. A replica delay part(204) generates a feedback clock by delaying the DLL clock to go through equal delay condition to the path of the clock. A current reduction control part(208) outputs a current reduction control signal in response to a clock enable signal and a fast mode signal with DLL locking information. A replica current reduction part(207) outputs an input signal of the replica delay part in response to the current reduction control signal and a clock signal of the delay line.
|
