发明名称 Memory
摘要 A memory allowing reduction of the period of an external access operation is provided. This memory comprises an access control portion performing an internal access operation on the basis of an external access operation, a refresh control portion performing a refresh operation and a refresh division control portion dividing the refresh operation into a read operation RFRD and rewrite operations RFRS 1 and RFRS 2 . The memory performs the read operation RFRD and the rewrite operations RFRS 1 and RFRS 2 at least either before or after different internal access operations corresponding to different external access operations respectively.
申请公布号 US7362642(B2) 申请公布日期 2008.04.22
申请号 US20060494748 申请日期 2006.07.28
申请人 SANYO ELECTRIC CO., LTD. 发明人 MIYAMOTO HIDEAKI;MATSUSHITA SHIGEHARU
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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