发明名称 APPARATUS AND METHOD FOR PROCESSING CLOCK SIGNAL OF SERIAL COMMUNICATION SYSTEM
摘要 An apparatus and a method for processing clock signals of a serial communication system are provided to prevent the attenuation of signals due to the length of wires by utilizing a reference clock according to clock signal conditions. A serial communication system includes a transmitter and a receiver(200). The receiver includes a reference clock generator(220), a serial transceiver(210), a control logic(240), a HDLC(High level Data Link Control) controller(230), and a microprocessor. The reference clock generator generates a reference clock. The serial transceiver converts clock and data signals received through a serial line into TTL(Transistor Transistor Logic) signals. The control logic processes serial data using the TTL and clock signals, sets an error detection range using the reference clock, and processes the serial data using the TTL signal and reference clock when a positive edge is not detected in the error detection range. The HDLC controller processes the serial data. The microprocessor executes a communication function according to the serial data.
申请公布号 KR20080034750(A) 申请公布日期 2008.04.22
申请号 KR20070021484 申请日期 2007.03.05
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK, HYUN OK
分类号 H04L7/033;H04L29/02 主分类号 H04L7/033
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