| 摘要 |
An implementation of an MPEG-4 compliant post-filter for image data, which performs deblocking and deringing post-filtering on decoded video data. The post-filter comprises two independent processing units, one for horizontal deblocking and the other for vertical deblocking and deringing, each processing unit in communication with a memory system, which can include DRAM. The post-filter further comprises a local memory, which can be SRAM, for high speed access to data being processed by the vertical deblocking and deringing filter, without additional accesses to the memory system. Further, horizontal deblocking and vertical deblocking and deringing functions can be performed concurrently in a pipe-lined fashion.
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