发明名称 System for and method of planarizing the contact region of a via by use of a continuous inline vacuum deposition
摘要 A multi-layer electronic device can be formed to include an insulative substrate ( 212 ), a first vapor deposited conductor layer ( 312 ) on the insulative substrate ( 212 ), a first vapor deposited insulator layer ( 314 ) on the first conductor layer ( 312 ), the first insulator layer ( 314 ) having at least one via hole ( 316 ) therein, and a vapor deposited conductive filler ( 320 ) in the via hole ( 316 ) of the first insulator layer ( 314 ). Desirably, the conductive filler ( 320 ) is deposited in the via hole ( 316 ) of the first insulator layer ( 314 ) such that the surface of the conductive filler ( 320 ) opposite the first conductor layer ( 312 ) is substantially planar with the surface of the first insulator layer ( 314 ) opposite the first conductor layer ( 312 ).
申请公布号 US7361585(B2) 申请公布日期 2008.04.22
申请号 US20050044140 申请日期 2005.01.27
申请人 ADVANTECH GLOBAL, LTD 发明人 BRODY THOMAS P.;MARCANIO JOSEPH A.
分类号 H01L21/4763;H01L21/20;H01L21/336;H01L21/36 主分类号 H01L21/4763
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