| 摘要 |
PROBLEM TO BE SOLVED: To solve the problem that when a printed wiring board is designed, the mounting positions and the mounting number of chip capacitors are set in a portion where a plane resonance frequency in simulation does not coincide with an integral multiple of the operating frequency of the circuit and design is carried out, but when verification is carried out as to an actually manufactured prototype, the value computed in the simulation has a minute error, so that the mounting positions etc. of the chip capacitors need be redesigned. SOLUTION: This multilayer printed wiring board has at least one layer of each of the power supply layer, the ground layer, and the circuit pattern layer. At least one pair of mutually parallel electrically conductive strip-like patterns is formed on the circuit pattern layer, coating layers having a predetermined width and a predetermined spacing are formed in the longitudinal direction of the one pair of the electrically conductive strip-like patterns and thereon respectively so that a plurality of chip components can be mounted in parallel, and a power supply plane and a ground plane are connected thereto respectively, so that the fine adjustment of the L component of the chip capacitor can be carried out and the plane resonance frequency can be changed. COPYRIGHT: (C)2008,JPO&INPIT |
