发明名称 |
CIRCUIT SIMULATION METHOD AND CIRCUIT SIMULATION APPARATUS |
摘要 |
PROBLEM TO BE SOLVED: To provide a circuit simulation apparatus reduced in simulation error. SOLUTION: The circuit simulation apparatus is provided with a means 52 for acquiring data on a transistor, a means 53 for generating connection information on an integrated circuit based on the transistor data, a means 54 for defining a model parameter based on the transistor data and a means 55 for receiving connection information, performing a circuit simulation execution program incorporating the model parameter to calculate an electric characteristic of the transistor. The model parameter is expressed by a formula including a term on the width of an active region of the transistor, a term on the width of an element separation region between the active region of the transistor and an active region arranged at the periphery of the active region of the transistor and a term on the width of the active region disposed at the periphery. COPYRIGHT: (C)2008,JPO&INPIT
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申请公布号 |
JP2008085030(A) |
申请公布日期 |
2008.04.10 |
申请号 |
JP20060262345 |
申请日期 |
2006.09.27 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
IKOMA DAISAKU;YAMASHITA KYOJI;SAWARA YASUYUKI;OTANI KAZUHIRO;ISHIZU TOMOYUKI |
分类号 |
H01L21/8234;G06F17/50;H01L21/336;H01L27/088;H01L29/00;H01L29/78 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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