TRANSISTOR SURROUND GATE STRUCTURE WITH PARTIAL SILICON-ON-INSULATOR FOR MEMORY CELLS, MEMORY ARRAYS, MEMORY DEVICES AND SYSTEMS AND METHODS OF FORMING SAME

摘要

A transistor surround gate structure and a method of forming thereof on a semiconductor assembly are described. The transistor surround gate structure is formed on a partial silicon-on- insulator in one direction and on a full silicon-on insulator in a second direction and may be scaled to 4f² line width for a memory array. A plurality of transistor surround gate structures are utilized as memory storage cells in various memory device applications, such as a dynamic random access memory application, a flash memory application and a single transistor memory cell is utilized in an embedded memory device application, which provide for the use of any one of the memory device applications to be used in a system.