| 摘要 |
<p>In a p-MOS transistor (10), a part of the gate electrode (13) is removed by a predetermined wet etching and the upper portion of the gate electrode (13) is formed lower than the upper portion of a side wall insulating film (14). With this configuration, in spite of formation of a tensile stress (TESL) film causing characteristic deterioration of the p-MOS transistor, the stress applied from the TESL film (16) to the gate electrode (13) and the side wall insulating film (14) is dispersed as shown by the broken-line arrows in the figure. As a result, a compressive stress is applied to a channel region to introduce a compressive distortion. Thus, even when the TESL film (16) is formed in the p-MOS transistor (10), distortion which improves the characteristic of the p-MOS transistor (10) is actually given to the channel region, which improves the characteristic of the p-MOS transistor (10).</p> |
