发明名称 |
LOW VOLTAGE OUTPUT BUFFER AND METHOD FOR BUFFERING DIGITAL OUTPUT DATA |
摘要 |
Method and apparatus are provided for buffering a data signal to a low voltage logic device. A circuit (10) for buffering the data signal to the low voltage logic device includes an output buffer (12) having first and second inputs and an output and at least one N-type isolation transistor (1 3, 19) having a source coupled to one or both of the second input and the output. The first input receives the data signal, the second input receives a supply potential, and the output couples to the low voltage logic device. The isolation transistor (13, 19) has a drain for receiving a first potential and is configured to supply a second potential to the output buffer when the gate receives a bias potential. The second potential based on the first potential. The bias potential is greater than the supply potential.
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申请公布号 |
WO2007103611(A3) |
申请公布日期 |
2008.04.10 |
申请号 |
WO2007US61844 |
申请日期 |
2007.02.08 |
申请人 |
FREESCALE SEMICONDUCTOR INC.;BENNETT, PAUL T.;PIGOTT, JOHN M. |
发明人 |
BENNETT, PAUL T.;PIGOTT, JOHN M. |
分类号 |
H03K19/094 |
主分类号 |
H03K19/094 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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