| 摘要 |
Interfaces, arrangements, and methods for controlling flash memory devices in multiple device systems without increasing a pin count are disclosed. In one embodiment, a memory controller can include a first interface to communicate with a host, and a second interface to communicate with a plurality of flash memory devices, where the second interface can include: a configuration terminal to transmit an instruction to the plurality of flash memory devices and to receive device identification information; a command control terminal to transmit a command timing signal to the plurality of flash memory devices; a clock terminal to transmit a clock signal to the plurality of flash memory devices; a read command terminal to receive a read command from the plurality of flash memory devices; and a first plurality of data input/output (I/O) terminals to transmit data to and receive data from the plurality of flash memory devices.
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