发明名称
摘要 PROBLEM TO BE SOLVED: To store many bits per cell, by using a memory cell array having a channel in a channel region and a transistor in the channel region, the transistor having a threshold voltage dependent on a doping concentration. SOLUTION: A cell is an n-type channel transistor formed on a semiconductor substrate 10. The cell has a gate 11 formed on a ROM array by a wordline, a drain 12 formed on the substrate 10 by an n-type implantation, and a source 13 formed on the substrate 10 by an n-type implantation. A channel well 14 is formed inside an isolation well 15. The well 15 is formed on a p-type semiconductor substrate 16. The well 14 is coupled to a substrate bias terminal 17 through which a substrate bias potential is applied to the channel region of the n-channel transistor. The channel region is formed by a p-type implantation in order to increase the threshold of the n-channel transistor.
申请公布号 JP4074693(B2) 申请公布日期 2008.04.09
申请号 JP19970306298 申请日期 1997.10.02
申请人 发明人
分类号 G11C16/04;H01L21/8246;H01L27/112 主分类号 G11C16/04
代理机构 代理人
主权项
地址