发明名称 Method for forming dual damascene structures with tapered via portions and improved performance
摘要 The manufacture of damascene structures having improved performance, particularly, but not by way of limitation, dual damascene structures is provided. In one embodiment, a substrate having a conductive layer is formed in a first insulating layer. A protective layer is formed above the conductive layer. An etching stop layer is formed above the protective layer and the first insulating layer. A second insulating layer is formed above the etching stop layer. A first patterned photoresist layer is formed above the second insulating layer, the first patterned photoresist layer having a first pattern. The first pattern is etched into the second insulating layer and the etching stop layer to form a first opening. A via plug is filled at least partially in the first opening. An anti-reflective coating (ARC) layer is formed above the second insulating layer. A second patterned photoresist layer is formed above the ARC layer, the second photoresist layer having a second pattern. The second pattern is etched into portions of the via plug, second insulation layer, and the ARC layer to form a second opening, wherein a substantially tapered sidewall portion is formed at the interface of the first and second openings.
申请公布号 US7354856(B2) 申请公布日期 2008.04.08
申请号 US20050071104 申请日期 2005.03.04
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 YEH MING-SHIH;TSAI MING-HSING;SHUE SHAU-LIN;YU CHEN-HUA
分类号 H01L21/44 主分类号 H01L21/44
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