发明名称 Method and apparatus for emulation of logic circuits
摘要 A method for emulating a logic circuit having at least one set of identical logic modules is disclosed. Each logic module in a set has logic elements and memory elements that store a module state of that logic module. The logic circuit is emulated by extracting a logic module from a set of identical logic modules, translating the extracted logic module for iterative representation of the module state of each of the logic modules with a single instance of the logic elements, and configuring a logic device with the translated logic module to emulate the logic circuit.
申请公布号 US7356454(B2) 申请公布日期 2008.04.08
申请号 US20040967814 申请日期 2004.10.18
申请人 UD TECHNOLOGY CORPORATION 发明人 SAKANE HIROFUMI;YAKAY LEVENT;KARNA VISHAL;LEUNG CLEMENT;GAO GUANG R.
分类号 G06F9/455;G06F17/50 主分类号 G06F9/455
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