Semiconductor integrated circuit device having ROM decoder for converting digital signal to analog signal

摘要

With respect to gate wires 34 P arranged in a P-ROM decoder 216 P, two confronting gate wires 34 P to which one bit of a digital signal representing a gradation level is input with being non-inverted or inverted are paired, and the width of the gate wire that contains the upper portion of the depletion type transistor 2 P (kept under ON-state at all times) and from the depletion type transistor 2 P until the enhancement type transistors 1 P adjacent to the depletion type transistor 2 P is set to a half of the gate wire width L on the transistor 1 P inside the gate wires 34 P.