| 摘要 |
A data alignment circuit and a data alignment method for a semiconductor memory device are provided to reduce layout area and power consumption, by reducing the number of latch circuits increasing according to the increase of the number of prefetches. According to a data alignment circuit of a semiconductor memory device aligning data which is inputted in series in parallel by a data strobe signal for prefetch operation, a first latch part(510,520,530) outputs a first and a second data alignment signal aligned to a falling edge of the data strobe signal by latching the data using the data strobe signal. A second latch part(540,550) outputs a third and a fourth data alignment signal aligned to the falling edge of the data strobe signal by latching the first and the second data alignment signal using the falling edge of the data strobe signal.
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