发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor integrated circuit device by which a signal delay in long distance wiring can be reduced by providing a most significant wiring layer without any constraint by an LSI process. SOLUTION: A process of providing a semiconductor integrated circuit substrate comprises: a process of forming on a base substrate 11 for a semiconductor integrated circuit the semiconductor integrated circuit and a wiring layer 12 which doesn't contain any most significant wiring layer for the semiconductor integrated circuit; and a process of forming on a wiring layer of the base substrate 11 for the semiconductor integrated circuit a connection pad 13 connected to the wiring layer. A process of providing a wiring substrate comprises: a process of carrying out on a base substrate 1 for the wiring substrate a plating of a thick film wiring layer 3 used as the most significant wiring layer for the semiconductor integrated circuit; and a process of forming on the thick film wiring layer 3 a bonding bump 6 connected to the thick film wiring layer 3. A face on which the connection pad 13 of the semiconductor integrated circuit substrate is formed is faced to a face on which the bonding bump 6 of the wiring substrate is formed, and the connection pad 13 and the bonding bump 6 are aligned and bonded. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008078514(A) 申请公布日期 2008.04.03
申请号 JP20060258175 申请日期 2006.09.25
申请人 TOKYO INSTITUTE OF TECHNOLOGY 发明人 EKI KAZUYA;OKADA KENICHI;HATAKEYAMA HIDEKI
分类号 H01L21/60;H01L21/3205;H01L23/12;H01L23/52;H01L23/538 主分类号 H01L21/60
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