发明名称 Resistive memory having shunted memory cells
摘要 A memory includes a bit line and a plurality of resistive memory cells coupled to the bit line. Each resistive memory cell is programmable to each of at least three resistance states. The memory includes a first resistor for selectively coupling to the bit line to form a first current divider with a selected memory cell during a read operation.
申请公布号 US2008080228(A1) 申请公布日期 2008.04.03
申请号 US20060541973 申请日期 2006.10.02
申请人 NIRSCHL THOMAS;HAPP THOMAS;PHILIPP JAN BORIS 发明人 NIRSCHL THOMAS;HAPP THOMAS;PHILIPP JAN BORIS
分类号 G11C11/00 主分类号 G11C11/00
代理机构 代理人
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