发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND THE SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor device which enables an extension region or an impurity diffusion region to be formed with proper controllability, and to provide its manufacturing method. <P>SOLUTION: MOS transistors of an n-channel type and a p-channel type are formed on a semiconductor substrate 100. The p-channel type MOS transistor has a gate electrode 102a and a first offset sidewall 103a; which is provided on a side surface of the gate electrode 102a with fine particles 110 formed of an embedded group IV semiconductor. The n-channel type MOS transistor has a gate electrode 102b and a second offset sidewall 103b, provided on the side surface of the gate electrode 102b. The fine particles 110 formed by carrying out heat treatment, after ion implantation of the group IV semiconductor, so that the first offset sidewall 103a can be made wider than the second offset sidewall 103b. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008078359(A) 申请公布日期 2008.04.03
申请号 JP20060255379 申请日期 2006.09.21
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TAKEOKA SHINJI
分类号 H01L21/8238;H01L21/336;H01L27/092;H01L29/78 主分类号 H01L21/8238
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