| 摘要 |
A dual function finFET structure includes a semiconductor fin located over a substrate. The semiconductor fin has a first side and a second side opposite the first side. A gate dielectric layer is located laterally adjoining the first side of the semiconductor fin, and a control gate is located further laterally adjoining the gate dielectric layer. A tunneling dielectric layer is located laterally adjoining the second side of the semiconductor fin. A floating gate is located further laterally adjoining the tunneling dielectric layer, an intergate dielectric layer is located further laterally adjoining the floating gate and a storage/programming gate is located further laterally adjoining the intergate dielectric layer. To enhance performance, the control gate has a narrower linewidth than the storage/programming gate.
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