| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor storage device where erroneous writing to non-selected memory cells is prevented. <P>SOLUTION: The device has a data writing mode of electrically separating and boosting a first boost channel area in the range of a non-selected memory cell of non-written and selected memory cells located on the side of a first selection gate transistor and a second boost channel area in the range of non-selected memory cells located closer to a second selection gate transistor than the selected memory cell when writing voltage is applied to the selected memory cell. In the data writing mode, write non-selection voltage to be applied to the non-selected memory cell adjacent to the second selection gate transistor is switched between a voltage V1 lower than the write non-selection voltage Vm to be applied to the other non-selected memory cells and a voltage V2 higher than this (V1<V2≤Vm) according to the position in the NAND cell unit of the selected memory cell. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
