发明名称 VARIABLE PATH INTERCONNECTION CELL, SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS DESIGN METHOD, AND METHOD FOR FORMATION OF VARIABLE PATH INTERCONNECTION CELL
摘要 PROBLEM TO BE SOLVED: To prevent increase of the number of mask correction processes and a mask cost required for the correction when a mask is changed for correction of a semiconductor integrated circuit. SOLUTION: A variable path interconnection cell C has first and second two inner existence interconnections e1, e2 existing inside alone and first and second two external extension interconnections E1, E2 whose external extension parts are terminals I1, I2. It has a first interconnection layer wherein the first and second inner existence interconnections e1, e2 can be selectively connected to the first and second external extension interconnections E1, E2, respectively, a second interconnection layer which has the same or similar pattern as the first interconnection layer, and is disposed opposite to the first interconnection layer whose directionality is different from that of the first interconnection layer, and an interlayer contact layer which selectively connects the first and second inner existence interconnections e1, e2 in the first interconnection layer to first and second inner existence interconnections f1, f2 in the second interconnection layer. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008078363(A) 申请公布日期 2008.04.03
申请号 JP20060255440 申请日期 2006.09.21
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KUBO JUNJI;YAMAMOTO ATSUSHI;TAKAOKA SHOJI
分类号 H01L21/82 主分类号 H01L21/82
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