发明名称 Method for forming dielectric layer on transistor with gate electrode, includes dielectric layer, which has pre-determined inner bracing and formed place holder structure on gate electrode, to increase component height on gate electrode
摘要 <p>The method includes dielectric layer, which has a pre-determined inner bracing. The method is formed, a place holder structure on a gate electrode (111), in order to increase component height locally on the gate electrode and another dielectric layer on a transistor (110), which has a pre-determined inner bracing. The place holder structure has a material layer on the transistor and carrying a structuring process on the material layer on the basis of a lateral desired measurement in the transistor longitudinal direction, which corresponds to the gate length of the gate electrode. Independent claims are also included for the following: (1) a method for forming a dielectric material adjacent to a canal area of a transistor (2) a semiconductor component with a transistor comprises a gate electrode and a canal area.</p>
申请公布号 DE102006046375(A1) 申请公布日期 2008.04.03
申请号 DE20061046375 申请日期 2006.09.29
申请人 ADVANCED MICRO DEVICES INC. 发明人 SCHWAN, CHRISTOF;HORSTMANN, MANFRED;FROHBERG, KAI;STEPHAN, ROLF
分类号 H01L21/336 主分类号 H01L21/336
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