| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To start ROM read operation of a plurality of memory chips at different timing when turning on power. <P>SOLUTION: A power-on reset circuit 18 is composed of a power-on level detector circuit 18a to detect the power supply voltage to output a power-on reset signal, and a delay circuit 18b to delay the power-on reset signal outputted from the power-on level detector circuit 18a. Two pads P0, P1 are connected to the delay circuit 18b to specify the chip address. The delay time in the delay circuit 18b is controlled by the combination of "L" and "H" voltages applied to those pads. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
