发明名称 LEVEL SHIFT CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a level shift circuit that determines a logic value while preventing load capacitance from increasing. SOLUTION: A voltage detector 10 detects the states of a first high potential voltage VND and a second high potential voltage VUP and generates first and second detection signals DZ and DX. A first logic unit 20 generates a first control signal S1 that is in accordance with an input signal Sin or having an L level in response to the input signal Sin and the first detection signal DZ. A second logic unit 30 generates a second control signal S2 that is in accordance with the first control signal S1 or having an H2 level in response to the first control signal S1 and the second detection signal DX. A level converter 40 generates an output signal Sout having the H2 level or the L level based on the first and second control signals S1 and S2. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008079298(A) 申请公布日期 2008.04.03
申请号 JP20070212404 申请日期 2007.08.16
申请人 FUJITSU LTD 发明人 OGAWA KAZUKI
分类号 H03K19/0185;H03K19/0948 主分类号 H03K19/0185
代理机构 代理人
主权项
地址